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T.J. Watson Research Center

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Definition & Purpose
From WindsorBlue to WindsorGreen
SIMD Architecture
90nm
Die: 21x23 mm
Module: 52.5 mm

32nm
Die: 15x15 mm
Module: 31 mm

1111C>
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Share sa me infra structure (Cold Plate Assembly, Spine, Back Plane Assembly)
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de sire: inter changeable with old Wind sorBlue cardlet s

4 ASICs per cardlet instead of 2 for WB
Software ba ckward compatible (with new features added)

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T.J. Watson Research Center

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Definition & Purpose
WindsorGreen (New) vs WindsorBlue (OLD)
Tile code performance
NanoClops performance

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Tile Memory size

32nm ASIC techn ology
-2 0 M instan ces per ASIC

Microcode Memory size

528 Processing Units per ASIC
SRAM size

56 MB emb edd ed DRAM per ASIC
,..,128 M cores on a full system

DRAM size

Partial Goo d Test
Water cooled

SRAM/DRAMBandwidth

Mesh or TreeOperations

Power Savings

1 WindsorGreen

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ASIC Status

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T.J. Watson Research Center

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Progress & Outlook
Release to Analysis (RTA) Phase
l 01/28/2013
09/12

12/06

10/12

Release to Preliminary (RTP) Phase

0°10

q-

l 05/31/2013

Release to Layout (RTL) Phase

0°10

q-

J 10/09/2013

Release to Checking (RTC) Phase

0°10

q-

l 01/15/2014

Release to Manufacturing (RTM) Phase

0°10

q-

l 01/28/2014

IPR Development

25°10~
- -

;rsr

I De!ayMnv
IASST

10/12

12/06

01/28/2013
05/31/2013
01/15/2014

Package Design

10°10I

~ - ~
09/12 10/12 12/06

J 12/19/2013

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T.J. Watson Research Center

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Pro~ress & Outlook
Design Implementation

95 %

Verification:Unit Testing

15 %

Verification:SubsystemTesting

6%

Verification:Full-ChipTesting

~

0%

Softwareand HardwareIntegrationand Test

15 %

1 WindsorGreen

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ASIC Status

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