UNITED STATES pATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 90/020,113 08/0112017 9368936 13-884-US 2485 23628 7590 03/27/2018 WOLF GREENFIELD & SACKS, P.C. 600 ATLANTIC AVENUE BOSTON, MA 02210-2206 EXAMINER WHITTINGTON, KENNETH ART UNIT PAPER NUMBER 3992 MAIL DATE DELIVERY MODE 03/27/2018 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) Commissioner for Patents United States Patent and Trademark Office P.O. Box 1450 Alexandria, VA 22313-·1450 W"aAA"I.IJ:.'=ptO.QOV DO NOT USE IN PALM PRINTER (THIRD PARTY REQUESTER'S CORRESPONDENCE ADDRESS) Eric Swildens 10632 Magdalena Road Los Altos Hills, CA 94024 EX PARTE REEXAMINATION COMMUNICATION TRANSMITTAL FORM REEXAMINATION CONTROL NO. 901020,113. PATENT NO. 9368936. ART UN IT 3992. Enclosed is a copy of the latest communication from the United States Patent and Trademark Office in the above identified ex parte reexamination proceeding (37 CFR 1.550(f)). Where this copy is supplied after the reply by requester, 37 CFR 1.535, or the time for filing a reply has passed, no submission on behalf of the ex parte reexamination requester will be acknowledged or considered (37 CFR 1.550(g)). PTOL-465 (Rev.0?-04) Office Action in Ex Parte Reexamination Control No. 90/020,113 Patent Under Reexamination 9368936 Examiner KENNETH J. WHITTINGTON Art Unit AlA (First Inventor to File) Status Yes 3992 -- The MAILING DATE of this communication appears on the cover sheet with the correspondence address -a.[8] Responsive to the communication(s) filed on 16 Februarv2018. D A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/were filed on _ _. b. D This action is made FINAL. c. [8] A statement under 37 CFR 1.530 has not been received from the patent owner. A shortened statutory period for response to this action is set to expire g month(s) from the mailing date of this letter. Failure to respond within the period for response will result in termination of the proceeding and issuance of an ex parte reexamination certificate in accordance with this action. 37 CFR 1.550(d). EXTENSIONS OF TIME ARE GOVERNED BY 37 CFR 1.550(c). If the period for response specified above is less than thirty (30) days, a response within the statutory minimum of thirty (30) days will be considered timely. Part I THE FOLLOWING ATTACHMENT(S) ARE PART OF THIS ACTION: 1. D Notice of References Cited by Examiner, PT0-892. 3. 2. D Information Disclosure Statement, PTO/SB/08. 4. Part II D D Interview Summary, PT0-474. SUMMARY OF ACTION 1a. [8] Claims 1-47 are subject to reexamination. 1b. D D Claims _ _ are not subject to reexamination. Claims 29,38 and 47 are patentable and/or confirmed. 4. [8] [8] 5. D Claims _ _ are objected to. 6. The drawings, filed on _ _ are acceptable. 7. D D The proposed drawing correction, filed on _ _ has been (7a) 8. D Acknowledgment is made of the priority claim under 35 U.S.C. § 119(a)-(d) or (f). 2. 3. Claims _ _ have been canceled in the present reexamination proceeding. Claims 1-28,30-37 and 39-46 are rejected. D a) All b) D Some* c) D None D approved (7b) been received. been filed in Application No. _ _ . 4 D D 5 D been received by the International Bureau in PCT application No. _ _ . 2 3 disapproved. of the certified copies have D D 1 D not been received. been filed in reexamination Control No. _ _ * See the attached detailed Office action for a list of the certified copies not received. 9. D Since the proceeding appears to be in condition for issuance of an ex parte reexamination certificate except for formal matters, prosecution as to the merits is closed in accordance with the practice under Ex parte Quayle, 1935 C. D. 11, 453 O.G. 213. 10. D Other: _ _ cc: Requester (if third party requester) U.S. Patent and Trademark Off1ce PTOL-466 (Rev. 08·13) Office Action in Ex Parte Reexamination Part of Paper No. 20180301 Control Number: 90/020,113 Page 2 Art Unit: 3992 NON-FINAL OFFICE ACTION This non-final Office Action addresses the claims 1-47 at issue in ex parte reexamination proceeding No. 90/020,113, involving United States Patent No. 9,368,936 to Lenius et al., entitled LASER DIODE FIRING SYSTEM (hereinafter the 5 "936 Patent"). Claims 1-47 are subject to reexamination herein. Claims 1-28, 30-37 and 39-46 are rejected. Claims 29, 38 and 47 are patentable. 10 I. (a) REFERENCES/DOCUMENTS CITED HEREIN United States Patent No. 7,969,558 to David Hall, issued June 28, 2011 (hereinafter "Hall"). (b) United States Patent No. 5,895,984 to Norbert Renz, issued April 20, 1999 (hereinafter "Renz"). 15 (c) "GaN Transistors for Efficient Power Conversion," 1st Edition, by Alex Lidow et al., publication date January 20, 2012 and made available to public at least as early as March 2, 2012 (hereinafter "Lidow"). (d) "Laser Driver Switching 20A with 2ns Pulse Width Using GaN," May 2010, IEEE MTTS International Microwave Symposium, pp. 1377-1381 (hereinafter "Liero"). 20 Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 3 Art Unit: 3992 II. 08/01/2017 RELEVANT PROSECUTION HISTORY A request for ex parte reexamination was filed for claims 1-20 of the 936 Patent (hereinafter the "Request"). 09/15/2017 An order granting ex parte reexamination for all claims 1-20 of the 936 Patent as proposed in the Request was mailed (hereinafter the "Order"). 5 12/18/2017 A non-final Office action was mailed rejecting claims 1-20 of the 936 Patent (hereinafter the "2017 NF Action"). The rejections provided therein were based on the Hall, Renz, Lidow and Liero references. 01/30/2018 10 An interview was held between Examiners and Patent Owner's representatives. An interview summary by the Examiners was mailed February 8, 2018. 02/16/2018 Patent Owner filed a response to the 2018 N FAction, including an amendment adding new claims 21-47 and arguments for patentability for all the claims (hereinafter the "Feb 2018 Amendment") and Exhibits A-L. 15 Exhibit C is a declaration by Andrew Wolfe (hereinafter the "Wolfe Declaration"). Ill. ACKNOWLEDGEMENTS Examiners acknowledge the Feb 2018 Amendment and Exhibits A-L. This action 20 is made in full consideration of these documents and all other papers properly made of record herein. Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 4 Art Unit: 3992 In the Feb 2018 Amendment, patented claims 1-20 were unchanged and new claims 21-47 were added. Therefore, claims 1-47 are pending and examined herein. IV. 5 PRIORITY OF INVENTION After review of the prosecution history of the 936 Patent, Examiners find that the 020 Patent was filed as U.S. Application No. 14/132,219, filed December 18, 2013 (hereinafter the "219 Application"). The 219 Application claims priority to U.S. Provisional Application No. 61/884,762, filed September 30, 2013 (hereinafter the "762 10 Provisional Application"). Following a review of each of these documents, Examiners find that patent claims 1-20 are entitled to a priority date and effective filing date extending to the filing of the 762 Provisional Application on September 30, 2013. V. 15 CLAIM INTERPRETATION After careful review of the original specification, the prosecution history, and unless expressly noted otherwise by the Examiners, the Examiners find that they are unable to locate any lexicographic definitions (either express or implied) with the required clarity, deliberateness, and precision with regard to the patent claims. Patent Owner has not disputed this finding. Because the Examiners are unable to locate any 20 lexicographic definitions with the required clarity, deliberateness, and precision, the Examiners conclude that Applicant is not his own lexicographer for patent claims 1-47. See MPEP §2111.01 IV. Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 5 Art Unit: 3992 The Examiners further find that because patent claims 1-47 herein recite neither "step for" nor "means for" nor any substitutes therefor, the claims fail Prong (A) as set forth in MPEP §2181 (I). Because all examined claims fail Prong (A) as set forth in MPEP §2181 (1), the Examiners conclude that all examined claims do not invoke 35 5 U.S.C. §112(f). See also Ex parte Miyazaki, 89 USPQ2d 1207,1215-16 (B.P.A.I. 2008)(precedential)(where the Board did not invoke 35 U.S.C. §112(f) because "means for" was not recited and because applicant still possessed an opportunity to amend the claims). Because of the Examiners' findings above that Applicant is not his own 10 lexicographer and patent claims 1-47 do not invoke 35 U.S.C. §112(f), patent claims 147 will be given the broadest reasonable interpretation consistent with the specification since patentee has an opportunity to amend claims. See MPEP §2258(1)(G), MPEP §2111, MPEP §2111.01 and In re Yamamoto eta/., 222 USPQ 934 (Fed. Cir. 1984). Under a broadest reasonable interpretation, words of the claim must be given their plain 15 meaning, unless such meaning is inconsistent with the specification. See MPEP §2111.01 (I). It is further noted it is improper to import claim limitations from the specification, i.e., a particular embodiment appearing in the written description may not be read into a claim when the claim language is broader than the embodiment. See MPEP §2111.01 (II). 20 Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 6 Art Unit: 3992 IV(A). Specific Interpretations Herein Below are specific interpretations of claim phrases that are not defined in either the claims or the specification, but are necessary to understand the scope of the claims and the manner to which the Examiners consider the prior art applied in the rejections 5 (hereinafter referred to as "Examiners' interpretation"). Examiners are not modifying these interpretations as applied in the 2017 NF Action, but are merely clarifying the interpretations in response to Patent Owner's arguments. discharge path 10 As discussed above, Examiners find that the phrase "discharge path" is not lexicographically defined in the specification. Patent Owner has not disputed this finding. Patent Owner however disputes the interpretation of this phrase as applied in the 2017 NF Action and proposed in the Request. Accordingly, an explanation for the Examiners interpretation is provided below. 15 As is well known in the art, energy can be stored in the electric fields of a capacitor. See Wolfe Declaration 1[0032. Specifically, as positive charge builds up on one conductive plate of the capacitor negative charge increases on the other plate. See /d. The energy is released by discharging the stored energy. When the capacitor is discharged, there is movement of current around the capacitor, for example movement 20 of charge away from the capacitor on one side thereof and a movement of charge toward the capacitor on the other side. Such movement is shown in the annotated version of FIG. 50 of the 936 Patent, reprinted below, provided by Patent Owner in the Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 7 Art Unit: 3992 E~·~~SS~:ON MODE 936 Patent FIG. 50 (as annotated by Patent Owner's Expert Andrew Wolfe) Wolfe Declaration at 1[0036. See also Feb 2018 Amendment page 9. As shown above, when the capacitor is discharged, a current moves away from the capacitor 516 while 5 current is moving towards it. This is because the net charge on a capacitor will always be zero. See Wolfe Declaration at 1[0033. Thus, in view of these findings and statements by one having ordinary skill in the art, Examiners find that the path of current during the discharge of a capacitor would necessarily include both the path of current moving away from the top plate of the 10 capacitor and the path of current moving towards to the bottom plate of the capacitor. Examiners thus interpret "discharge path" herein as the path of current occurring during the discharge of a capacitor, which would include both of these paths. Such an interpretation is consistent with the explanation of how a capacitor works by Patent Owner's expert. Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 8 Art Unit: 3992 Furthermore, such a finding is consistent with the disclosure of Renz, which discloses a circuit for charging and discharging a capacitor. For example, Renz states with regard to FIG. 5 of Renz, reprinted below, that when "the MOF-FET in this case r--··-~-- ·----------------~'.:·~.-_;,; .] .·.· ( tO c:ontrol pul:ses ~r1.. Renz FIG. 5 5 serves to exclusively trigger a useful pulse, that is to say discharge the capacitor 4 through the diode laser." See Renz col. 5, lines 13-15 referring to MOS-FET 1', capacitor 4 and diode laser 2. Specifically, when the MOS-FET is set to "on," the discharge of the capacitor 4 causes current to move away from the capacitor 4 toward 10 the MOS-FET 1' and further current moves towards the capacitor 4 from the ground through the laser diode 2, which causes the laser diode to fire. The laser diode 2 would not fire otherwise. Accordingly, the discharge path necessarily includes the movement of current on both sides of the capacitor, i.e., the path of current moving away from the top plate of the capacitor and the path of current moving toward the bottom plate of the Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 9 Art Unit: 3992 capacitor during discharge. The movement of current along the portion of the discharge path from the ground through the laser diode 2 and the capacitor is the basis for operation of the circuit of Renz. The circuit shown in FIG. 23A of Hall discussed below operates in a similar manner. 5 charging path As discussed above, Examiners find that the phrase "charging path" is not lexicographically defined in the specification. Accordingly, along with the explanation above for discharge path, an explanation for the Examiners interpretation is provided 10 below. As is well known in the art and discussed above, energy can be stored in the electric fields of a capacitor. See Wolfe Declaration 1[0032. Specifically, as positive charge builds up on one conductive plate of the capacitor negative charge increases on the other plate. See /d. As also discussed above, there is always a net charge is 15 always zero. See Wolfe Declaration 1[1[0033-0034. During charging of the capacitor, the capacitor to a voltage source and positive charge is accumulated on one plate of the capacitor and negative charge is accumulated on the other plate. See Wolfe Declaration 1[0034. Thus, while the capacitor is being charged, current flows from voltage source to one plate of the capacitor and simultaneously, current flows away 20 from the bottom plate of the capacitor. Such is shown in FIG. 5C of o the 936 Patent as Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 10 Art Unit: 3992 CHARGING MODE ... $UJ 5t4 v(-C. _____ _ \ 502 '\ Cnpac:hnr 1Cttat·g,ing J r: urre nt I t I Oisp!acc:mcnt I Curren~ •! 936 Patent FIG. 5C (as annotated by Patent Owner's Expert Andrew Wolfe) annotated by the Patent Owner's expert in ,-r0035 of the Wolfe Declaration. See also Feb 2018 Amendment page 9. As shown above, when the capacitor is charged, a 5 current moves towards the top plate of the capacitor 516 while current also moves away from the bottom plate of the capacitor. This is because the net charge on a capacitor will always be zero. Thus, in view of these findings and statements by one having ordinary skill in the art, Examiners find that the path of current during the charge of a capacitor would 10 necessarily include both the path of current moving toward the top plate of the capacitor and the path of current away from the bottom plate. Examiners thus interpret "charge path" herein as the path of current occurring during the charging of a capacitor, which would include both of these current paths. Such an interpretation is consistent with the explanation of how a capacitor works by Patent Owner's expert Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 11 Art Unit: 3992 IV(B). Considerations of Patent Owner Arguments Regarding Claim Interpretation Patent Owner first argues that the 936 Patent "unambiguously conveys what is meant by the discharge path." See Feb 2018 Amendment pages 23-24. Examiners 5 disagree. First, Patent Owner does not dispute that the specification does not lexicographically define this phrase. Thus, since this exception to BRI does not apply, then the specification examples of this phrase in the specification will not be read into the claims. Second, the specification of the 936 Patent does not describe and the drawings fail to illustrate an example of the precise scope of the discharge path. 10 Furthermore, the specification of the 936 Patent also states "[t]he various aspects and example embodiments disclosed herein are for purposes of illustrations and are not intended to be limiting, with the true scope and spirit being indicated by the following claims." See 936 Patent col. 27, line 66 to col. 28, line 3. Thus, the specification explicitly disavows any limiting interpretations and/or examples provided in the 15 specification. Finally, while Examiners do not dispute that the specification uses the phrase "discharge path," Examiners nevertheless find the specification fails, via a description or an illustrate in any drawing, of the actual scope of the discharge path. Rather the specification at most provides a description of and illustrations for a "current path" and "discharge current path" (936 Patent at col. 22, lines 54-64) and "diode driving 20 current" (shown in FIG. 50), all of which omit discussion of any current movement in important portions of the circuit during discharge. In view of these findings, Examiners Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 12 Art Unit: 3992 do not find any "unambiguous" conveyance of limiting scope of the discharge path and further the specification explicitly states it is not "limiting." Patent Owner further disputes the interpretation of discharge path provided in the Request. See Feb 2018 Amendment pages 24-25. Specifically, Patent Owner disputes 5 the annotated version of FIG. 50 provided in the Request (See Request page 23, hereinafter the "Request's FIG. 50"), which shows a manner to which the current travels near the ground during discharge of the capacitor. Patent Owner then provides its own annotated version of FIG. 50 showing a different current path near the ground during discharge of the capacitor. See Feb 2018 Amendment page 9 and the Wolfe 10 Declaration 1[0036 (hereinafter the "PO's FIG. 50"). However, Examiners find that each of FIG. 50 of the 936 Patent and the Request's FIG. 50 omit essential portions of the discharge path and the PO's FIG. 50 is inconsistent with ordinary skill in the art. Nevertheless, Examiners submit that the above Examiners' interpretation of discharge path is in general consistent with the submissions provided in each of these figures and 15 further Examiners will address each figure in turn. Examiners first note that FIG. 50 as provided in the 936 Patent, reprinted below, Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Page 13 Control Number: 90/020,113 Art Unit: 3992 EMISSION MODE .r-·~soo , Diode I.Drh'iug :curr~ni I I 516) ' ' 936 Patent FIG. 50 (unannotated) shows only a portion of the discharge path as determined by the Examiners above. As found by Examiners, the discharge path includes the path of current flowing away from 5 the top plate of the capacitor and the current flowing towards the bottom plate of the capacitor as a result of discharging the capacitor. Notably, this figure does not address what happens directly between the capacitor 516 and the ground. Rather any discussion of what happens in this region is omitted from the disclosure of the 936 Patent. Nevertheless, Examiners' interpretation is consistent with FIG. 50 of the 936 10 Patent since Examiners' interpretation encompasses the current path shown in this figure, i.e., current flowing away from the top plate of the capacitor. Examiners next note that the Request's FIG. 50, reprinted below, attempts to Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Page 14 Control Number: 90/020,113 Art Unit: 3992 EMISSION MOOE 514 ( \ Diode I Driving . ·(·.,;urr-£1h 1 '' Request's FIG. 50 (annotated in the Request) show more of what happens during discharge of the capacitor 516, but does not show or disclose what happens at the ground shown in the drawing. The Request's FIG. 50 5 does not show whether current flows up from the ground or flows down toward the ground. The Request's FIG. 50 is, however, generally consistent with the Examiners' interpretation above wherein during discharge of the capacitor, current will flow both away from one plate of the capacitor while current will flow towards the other plate. Finally, Examiners note that the PO's FIG. 50, reprinted below, while showing Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 15 Art Unit: 3992 E~·~~SS~:ON MODE PO's FIG. 50 (as annotated by Patent Owner's Expert Andrew Wolfe) some similar features to the Request's version of this drawing, nevertheless illustrates a feature inconsistent with ordinary knowledge in the art. As shown in this figure, current 5 is passing between the circuit and the ground along a single wire in two directions. This is not possible in view of the fact that current moves in one direction between higher and lower voltages (i.e., electrons move from the negative/ground terminal to the positive terminal). Nevertheless, what is of import is that this drawing shows that during discharge of the capacitor, current is moving away from one plate of the capacitor 516 10 and moving toward the other plate of the capacitor which is generally consistent to the Examiners' interpretation above. In view of the above findings by Examiners, Examiners do not find either the Request's omissions or the Patent Owner's impossible circuit persuasive as to the nature of what happens around the ground. Nevertheless, Examiners maintain the 15 Examiners' interpretation provided above, i.e., that the discharge path includes both the Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 16 Art Unit: 3992 path of current moving away from the top plate of the capacitor and the path of current moving towards to the bottom plate of the capacitor. Such is consistent with the 936 Patent FIG. 50, the Request's FIG. 50 and the PO's FIG. 5d above which illustrate and show the flow of current away from one plate of the capacitor and further this 5 interpretation is consistent with the Request's FIG. 50 and the POs FIG. 50 which illustrate the flow towards the other plate of the capacitor. Furthermore, this interpretation does not need to address what happens around the ground connection. Thus, the Examiners find the ordinary and customary meaning under BRI of discharge path would have the appearance as shown in the dashed line below: t!M!SS~ON MODE 10 Examiners interpretation of FIG. 50 discharge path (annotated by Examiners) Patent Owner further argues that the Federal Circuit has made clear that under BRI, a claim term may not be interpreted so broadly that it is inconsistent with the specification. See Feb 2018 Amendment page 26. Examiners agree. As noted above, 15 while the specification discussed what happens on one side of the capacitor, i.e., Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 17 Art Unit: 3992 current moves away from the top plate of the capacitor, the specification is silent as to the nature of what happens directly between the capacitor and ground. The Examiners interpretation includes this interpretation and thus Examiners find nothing inconsistent with the specification. Furthermore, Examiners find that the omission in the 5 specification of any discussion of what happens on the bottom plate of the capacitor does not amount to a claim limitation of the discharge path to not include such path. Patent Owner further argues that the Request's proposed interpretation and the Examiners' interpretation discussed during the interview is improper because it excludes one of the disclosed embodiments. See Feb 2018 Amendment pages 26-28. 10 Examiners disagree. Patent Owner has misapplied the quotation provided by Patent Owner, i.e., "a claim interpretation that excludes a preferred embodiment from the scope of the claim is rarely, if ever, correct." The Federal Circuit when making this statement did not state that the claim interpretation must include every embodiment, rather the claim interpretation must not exclude a "preferred embodiment." 1 15 Furthermore, Examiners claim interpretation would include and is consistent with the preferred embodiment shown in FIG. 50 of the 936 Patent as shown above. The Examiners' claim interpretation would also include the alternative embodiment (preferred?) suggested by Patent Owner, i.e., the capacitor connected to some other different reference voltage, not the ground. 1 Examiners further note that Patent Owner's argument does not make sense in view of newly added claims 29, 38 and 47, which require the capacitor to be coupled to a reference voltage other than ground. Any interpretation of these claims would necessarily exclude the invention shown in FIGS. 5A-5D which explicitly require the capacitor to be couple to ground. Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 18 Art Unit: 3992 Patent Owner further argues that Patent Owner has submitted overwhelming evidence and testimony of Patent Owner's expert establishing the ordinary meaning of "discharge path" such that it does not include a path from "the ground to the bottom plate of the capacitor." See Feb 2018 Amendment, pages 29-31. Examiners disagree. 5 First, Examiners note that in each of the references cited by Patent Owner refer to a discharge path "to ground." Patent Owner's arguments also consistently refer to a discharge path "to ground." If the discharge path is so well known, why must each reference clarify where this path leads? Examiners submit, as in the interpretation above, the discharge path includes not only a path away from the top plate of the 10 capacitor (to the ground so to speak), but a path towards the bottom plate of the capacitor. The simple fact that these selected references and the 936 Patent omit a discussion of what happens on the other side of the capacitor does not mean the current is not moving along this path during discharge. Furthermore, Renz, as discussed above, employs this other path towards the capacitor during discharge to fire 15 the laser diode. Accordingly, Examiners find Renz more convincing with the explicit discussion and use of the path towards the capacitor during discharge than the other prior art references cited by Patent Owner and the 936 Patent which omit any discussion thereof. Furthermore, Patent Owner's expert testimony is based on these same references and thus is not persuasive for the same reasons. Furthermore, Patent 20 Owner's expert testimony is not convincing to show that the path even goes to ground in view of the magic ground wire shown in PO's FIG. 50 which shows current moving in two direction along a single wire. Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 19 Art Unit: 3992 IV(C). Conclusion of Claim Interpretation As discussed above, Examiners do not find any lexicographic definitions of any claim terms and no phrases in the claims invoked 35 U.S. C. §112(61h 1[). Accordingly, 5 Examiners will interpret the claims using the broadest reasonable interpretation. Furthermore, in accordance with the broadest reasonable interpretation, Examiners interpret "discharging path" and "charging path" as discussed above. VI. STATUTORY BASIS FOR ART REJECTIONS 35 U.S.C. §102 10 The following is a quotation of the appropriate paragraphs of 35 U.S.C. §1 02 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless- 15 20 (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 35 U.S.C. §103(a) 25 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: 30 A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 20 Art Unit: 3992 ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 5 VII. ART REJECTIONS APPLYING EXAMINERS'S INTERPRETATION OF CHARGING PATH AND DISCHARGE PATH Anticipation Rejections Applying FIG. 23A of Hall Claims 1-4, 7-15, 17-19, 21, 27, 28, 30, 36, 37, 39, 45 and 46 are rejected under 10 35 U.S.C. 102(a)(1) as being anticipated by FIG. 23A of Hall. Examiners note Hall is a proper reference for use in this reexamination proceeding because it is a patent. (See MPEP §221 0 and §2244--SNQs must be based on patents and printed publications). Regarding claim 1, FIG. 23A of Hall discloses an apparatus (See Hall FIG. 23A, reprinted below), comprising: 15 Hall FIG. 23A Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 21 Art Unit: 3992 a voltage source (See FIG. 23A above, note voltage source V+); an inductor coupled to the voltage source, wherein the inductor is configured to store energy in a magnetic field (See FIG. 23A above, note inductor 204); 5 a diode coupled to the voltage source via the inductor (See FIG. 23A, note diode shown but not identified coupled to inductor 204); a transistor configured to be turned on and turned off by a control signal (See FIG. 23A, note transistor 200 activated by DSP control signal); a light emitting element coupled to the transistor (See FIG. 23A above, note 10 laser diode 21 0); a capacitor coupled to a charging path and a discharge path (See FIG. 23A, note capacitor 206. Note also Examiners' interpretation of charging path and discharge path), wherein the charging path includes the inductor and the diode, and wherein the discharge path includes the transistor and the light emitting element (See FIG. 15 23A above, note charging path would include at least the inductor 204 and shown but not identified diode and discharge path would include at least the transistor 200 and the laser diode 210. See also Hall col. 7, lines 17-41); wherein, responsive to the transistor being turned off, the capacitor is configured to charge via the charging path such that a voltage across the 20 capacitor increases from a lower voltage level to a higher voltage level and the inductor is configured to release energy stored in the magnetic field such that a current through the inductor decreases from a higher current level to a lower Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 22 Art Unit: 3992 current level (See FIG. 23A, note configuration shown which provided the recited functionality. See also col. 7, lines 17-41); and wherein, responsive to the transistor being turned on, the capacitor is configured to discharge through the discharge path such that the light emitting 5 element emits a pulse of light and the voltage across the capacitor decreases from the higher voltage level to the lower voltage level and the inductor is configured to store energy in the magnetic field such that the current through the inductor increases from the lower current level to the higher current level (See FIG. 23A, note configuration shown which provided the recited functionality. See also 10 col. 7, lines 17-41 ). Regarding claim 2, FIG. 23A of Hall discloses the apparatus of claim 1 and further wherein the lower current level is approximately zero (See col. 7, lines 27-29 wherein energy stored in the inductor is transferred to the capacitor when the transistor is turned off. Thus, the energy remaining in the inductor is "approximately zero"). 15 Regarding claim 3, FIG. 23A of Hall discloses the apparatus of claim 1 and further wherein the capacitor is charged immediately following emission of a pulse of light from the light emitting element (See FIG. 23A above, note configuration shown provides the noted functionality. See also col. 7, lines 17-41 wherein following the pulse of light, the transistor 200 is turned off and the energy of the inductor 204 is 20 transferred to the capacitor 206). Regarding claim 4, FIG. 23A of Hall discloses the apparatus of claim 1 and further wherein the higher voltage level is greater than a voltage of the voltage Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 23 Art Unit: 3992 source (See FIG. 23A above, note this is merely a property of the circuit shown), and wherein the diode has an anode coupled to the voltage source via the inductor and a cathode coupled to the capacitor, such that the diode is forward biased when the voltage across the capacitor is at the lower voltage level and the diode 5 is reverse biased when the voltage across the capacitor is at the higher voltage level (See FIG. 23A above, note shown but not identified diode coupled in series with the inductor 204). Regarding claim 7, FIG. 23A of Hall discloses the apparatus of claim 1 and further wherein the light emitting element is a laser diode (See FIG. 23A above, note 10 laser diode 21 0). Regarding claim 8, FIG. 23A of Hall disclose the apparatus of claim 7 and further comprising a drain diode coupled across the laser diode, wherein the drain diode is configured to discharge an internal capacitance of the laser diode through the drain diode when the transistor is off (See FIG. 23A above, note drain/catch diode 15 21 coupled with laser diode 21 0). Regarding claim 9, FIG. 23A of Hall discloses a method (See FIG. 23A above and col. 7, lines 17-41), comprising: turning off a transistor (See col. 7, lines 17-41 wherein a transistor is turned on and off), wherein the transistor is coupled to a light emitting element (See FIG. 23A 20 above, note transistor 200 coupled to laser diode 21 0), wherein both the transistor and the light emitting element are included in a discharge path coupled to a capacitor (See FIG. 23A above. Note also Examiners' interpretation of discharge path Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 24 Art Unit: 3992 as discussed above. Thus, note discharge path would include transistor 200, capacitor 206 and laser diode 21 0), wherein the capacitor is also coupled to a charging path including a diode and an inductor, wherein the inductor is configured to store energy in a magnetic field, wherein the diode is coupled to a voltage source via 5 the inductor (See FIG. 23A above. Note also Examiners' interpretation of charging path as discussed above. Thus, note charge path would include voltage source V+, inductor 204 and series connected shown but not identified diode), and wherein, responsive to the transistor being turned off, the capacitor is configured to charge via the charging path such that a voltage across the capacitor increases 10 from a lower voltage level to a higher voltage level and the inductor is configured to release energy stored in the magnetic field such that a current through the inductor decreases from a higher current level to a lower current level (See FIG. 23A, note configuration shown which provided the recited functionality. See also col. 7, lines 17-41 ); and 15 turning on the transistor, wherein responsive to the transistor being turned on, the capacitor is configured to discharge through the discharge path such that the light emitting element emits a pulse of light and the voltage across the capacitor decreases from the higher voltage level to the lower voltage level and the inductor is configured to store energy in the magnetic field such that the 20 current through the inductor increases from the lower current level to the higher current level (See FIG. 23A, note configuration shown which provided the recited functionality. See also col. 7, lines 17-41 ). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 25 Art Unit: 3992 Regarding claim 10, FIG. 23A of Hall discloses the method of claim 9 and further wherein the lower current level is approximately zero (See col. 7, lines 27-29 wherein energy stored in the inductor is transferred to the capacitor when the transistor is turned off. Thus, the energy remaining in the inductor is "approximately zero"). Regarding claim 11, FIG. 23A of Hall discloses the method of claim 9 and further 5 wherein the capacitor is charged immediately following emission of a pulse of light from the light emitting element (See FIG. 23A above, note configuration shown provides the noted functionality. See also col. 7, lines 17-41 wherein following the pulse of light, the transistor 200 is turned off and the energy of the inductor 204 is transferred 10 to the capacitor 206). Regarding claim 12, FIG. 23A of Hall discloses the method of claim 9 and further wherein the higher voltage level is greater than a voltage of the voltage source (See FIG. 23A above, note this is merely a property of the circuit shown), and wherein the diode has an anode coupled to the voltage source via the inductor and a 15 cathode coupled to the capacitor, such that the diode is forward biased when the voltage across the capacitor is at the lower voltage level and the diode is reverse biased when the voltage across the capacitor is at the higher voltage level (See FIG. 23A above, note shown but not identified diode coupled in series with the inductor 204). 20 Regarding claim 13, FIG. 23A of Hall discloses the method of claim 9 and further wherein the charging of the capacitor is carried out in about 500 nanoseconds (Examiners find that this limitation is merely an intended result or property of the circuit Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 26 Art Unit: 3992 and the turning on and off of the transistor in the method recited in claim 9. Accordingly, this limitation is non-limiting of the claim and thus Hall reads on this claim. Additionally and alternatively, since Hall otherwise discloses the recited circuit and performs the recited method steps, the circuit of Hall would be capable of meeting the intended 5 result). Regarding claim 14, FIG. 23A of Hall discloses the method of claim 9 and further wherein the light emitting element is a laser diode (See FIG. 23A above, note laser diode 21 0). Regarding claim 15, FIG. 23A of Hall discloses of the method of claim 14 and 10 further comprising when the transistor is off, discharging an internal capacitance of the laser diode via a drain diode coupled across the laser diode (See FIG. 23A, note drain/catch diode coupled with the laser diode 210 which performs the recited functionality). Regarding claim 17, FIG. 23A of Hall discloses a light detection and ranging 15 (LIDAR) device (See FIG. 23A above and FIG. 9A and see col. 3, lines 3-4 and col. 4, lines 41-43) comprising: a light source including: a voltage source (See FIG. 23A above, note voltage source V+); an inductor coupled to the voltage source, wherein the inductor is 20 configured to store energy in a magnetic field (See FIG. 23A above, note inductor 204); Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 27 Art Unit: 3992 a diode coupled to the voltage source via the inductor (See FIG. 23A, note diode shown but not identified coupled to inductor 204); a transistor configured to be turned on and turned off by a control signal (See FIG. 23A, note transistor 200 activated by DSP control signal); 5 a light emitting element coupled to the transistor (See FIG. 23A above, note laser diode 21 0); a capacitor coupled to a charging path and a discharge path (See FIG. 23A, note capacitor 206. Note Examiners' interpretation above for charging path and discharge path), wherein the charging path includes the inductor and the diode, 10 and wherein the discharge path includes the transistor and the light emitting element (See FIG. 23A above, note charging path which would include inductor 204 and shown but not identified diode and discharge path including the transistor 200 and the laser diode 210. See also Hall col. 7, lines 17-41); wherein, responsive to the transistor being turned off, the capacitor is 15 configured to charge via the charging path such that a voltage across the capacitor increases from a lower voltage level to a higher voltage level and the inductor is configured to release energy stored in the magnetic field such that a current through the inductor decreases from a higher current level to a lower current level (See FIG. 23A, note configuration shown which provided the recited 20 functionality. See also col. 7, lines 17-41); and wherein, responsive to the transistor being turned on, the capacitor is configured to discharge through the discharge path such that the light emitting Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 28 Art Unit: 3992 element emits a pulse of light and the voltage across the capacitor decreases from the higher voltage level to the lower voltage level and the inductor is configured to store energy in the magnetic field such that the current through the inductor increases from the lower current level to the higher current level (See 5 FIG. 23A, note configuration shown which provided the recited functionality. See also col. 7, lines 17-41); a light sensor configured to detect a reflected light signal comprising light from the emitted light pulse reflected by a reflective object (See col. 3, lines 4-9 and col. 4, lines 21-26 wherein the circuit of FIG. 23A is part of a LIDAR system which 10 uses photo detectors as light sensors as part of the system); and a controller configured to determine a distance to the reflective object based on the reflected light signal (See col. 4, lines 21-43 which uses a DSP to determine ranging information). Regarding claim 18, FIG. 23A of Hall discloses the device of claim 17 and further 15 wherein the lower current level is approximately zero (See col. 7, lines 27-29 wherein energy stored in the inductor is transferred to the capacitor when the transistor is turned off. Thus, the energy remaining in the inductor is "approximately zero"). Regarding claim 19, FIG. 23A of Hall discloses the device of claim 17 and further wherein the capacitor is charged immediately following emission of a pulse of 20 light from the light emitting element (See FIG. 23A above, note configuration shown provides the noted functionality. See also col. 7, lines 17-41 wherein following the pulse Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 29 Art Unit: 3992 of light, the transistor 200 is turned off and the energy of the inductor 204 is transferred to the capacitor 206). Regarding claim 21, FIG. 23A of Hall discloses the apparatus of claim 1 and further wherein the capacitor has a first terminal and a second terminal, and 5 wherein the discharge path forms a current path from the first terminal of the capacitor toward ground (See FIG. 23A above, note capacitor 206 has two terminals. Further note Examiners' interpretation of discharge path would include the current path flowing away from the top plate of the capacitor during discharge thereof would form a path to the ground through the transistor 200. Note also in view of the open claim 10 language the discharge could also include the current path from the ground and through the laser diode 210 to the bottom plate of the capacitor). Regarding claim 27, FIG. 23A of Hall discloses the apparatus of claim 1 and further wherein a cycle of discharging and charging the capacitor is achieved by turning the transistor on and off one time (See FIG. 23A above, note this claim 15 recites merely an operational/functional characteristic of the structures shown). Regarding claim 28, FIG. 23A of Hall discloses the apparatus of claim 1 and further wherein a first terminal of the capacitor is coupled to the discharge path and a second terminal of the capacitor is coupled to ground (See FIG. 23 above and note Examiners' interpretation of discharge path, which includes the current path 20 moving away from the top plate/first terminal of the capacitor 206 and a current path moving towards the bottom plate/second terminal of the capacitor from the ground). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 30 Art Unit: 3992 Regarding claim 30, FIG. 23A of Hall discloses the method of claim 9 and further wherein the capacitor has a first terminal and a second terminal, and wherein the discharge path forms a current path from the first terminal of the capacitor toward ground (See FIG. 23A above, note capacitor 206 has two terminals. 5 Further note Examiners' interpretation of discharge path would include the current path flowing away from the top plate of the capacitor during discharge thereof would form a path to the ground through the transistor 200. Note also in view of the open claim language the discharge could also include the current path from the ground and through the laser diode 210 to the bottom plate of the capacitor). 10 Regarding claim 36, FIG. 23A of Hall discloses the method of claim 9 and further wherein a cycle of discharging and charging the capacitor is achieved by turning the transistor on and off one time (See FIG. 23A above, note this claim recites merely an operational/functional characteristic of the structures shown). Regarding claim 37, FIG. 23A of Hall discloses the method of claim 9 and further 15 wherein a first terminal of the capacitor is coupled to the discharge path and a second terminal of the capacitor is coupled to ground (See FIG. 23 above and note Examiners' interpretation of discharge path, which includes the current path moving away from the top plate/first terminal of the capacitor 206 and a current path moving towards the bottom plate/second terminal of the capacitor from the ground). 20 Regarding claim 39, FIG. 23A of Hall discloses the device of claim 17 and further wherein the capacitor has a first terminal and a second terminal, and wherein the discharge path forms a current path from the first terminal of the Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 31 Art Unit: 3992 capacitor toward ground (See FIG. 23A above, note capacitor 206 has two terminals. Further note Examiners' interpretation of discharge path would include the current path flowing away from the top plate of the capacitor during discharge thereof would form a path to the ground through the transistor 200. Note also in view of the open claim 5 language the discharge could also include the current path from the ground and through the laser diode 210 to the bottom plate of the capacitor). Regarding claim 45, FIG. 23A of Hall discloses the device of claim 17 and further wherein a cycle of discharging and charging the capacitor is achieved by turning the transistor on and off one time (See FIG. 23A above, note this claim recites 10 merely an operational/functional characteristic of the structures shown). Regarding claim 46, FIG. 23A of Hall discloses the device of claim 17 and further wherein a first terminal of the capacitor is coupled to the discharge path and a second terminal of the capacitor is coupled to ground (See FIG. 23 above and note Examiners' interpretation of discharge path, which includes the current path moving 15 away from the top plate/first terminal of the capacitor 206 and a current path moving towards the bottom plate/second terminal of the capacitor from the ground). Anticipation Rejections Applying Renz Claims 1-4, 7, 8, 21, 27 and 28 are rejected under 35 U.S.C. 102(a)(1) as being 20 anticipated by Renz. Examiners note Renz is a proper reference for use in this reexamination proceeding because it is a patent. (See MPEP §221 0 and §2244--SNQs must be based on patents and printed publications). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 32 Art Unit: 3992 Regarding claim 1, Renz discloses an apparatus (See Renz FIG. 5, reprinted below), comprising: aontrcl pulses __n_ Renz FIG. 5 5 a voltage source (See FIG. 5 above, note voltage source 14); an inductor coupled to the voltage source, wherein the inductor is configured to store energy in a magnetic field (See FIG. 5 above, note inductor 10); a diode coupled to the voltage source via the inductor (See FIG. 5 above, note diode 13); 10 a transistor configured to be turned on and turned off by a control signal (See FIG. 5 above, note transistor 1'); a light emitting element coupled to the transistor (See FIG. 5 above, note laser diode 2); Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 33 Art Unit: 3992 a capacitor coupled to a charging path and a discharge path (See FIG. 5 above, note capacitor 4. Note Examiners' interpretation of charging path and discharge path discussed above), wherein the charging path includes the inductor and the diode, and wherein the discharge path includes the transistor and the light 5 emitting element (See FIG. 5 above, note charge path would include the inductor 10 and the diode 13 and discharge path would include transistor 1' and the laser diode 2. See also Renz col. 5, lines 4-32); wherein, responsive to the transistor being turned off, the capacitor is configured to charge via the charging path such that a voltage across the 10 capacitor increases from a lower voltage level to a higher voltage level and the inductor is configured to release energy stored in the magnetic field such that a current through the inductor decreases from a higher current level to a lower current level (See FIG. 5 above, note configuration shown which provided the recited functionality. See also col. 5, lines 4-32 and col. 3, lines 28-60); and 15 wherein, responsive to the transistor being turned on, the capacitor is configured to discharge through the discharge path such that the light emitting element emits a pulse of light and the voltage across the capacitor decreases from the higher voltage level to the lower voltage level and the inductor is configured to store energy in the magnetic field such that the current through the 20 inductor increases from the lower current level to the higher current level (See FIG. 5 above, note configuration shown which provided the recited functionality. See also col. 5, lines 4-32 and col. 3, lines 28-60). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 34 Art Unit: 3992 Regarding claim 2, Renz discloses the apparatus of claim 1 and further wherein the lower current level is approximately zero (See col. 3, lines 36-43 wherein the energy in the inductor is transferred to the capacitor when the transistor is turned off. Thus, the energy remaining in the inductor is "approximately zero"). 5 Regarding claim 3, Renz discloses the apparatus of claim 1 and further wherein the capacitor is charged immediately following emission of a pulse of light from the light emitting element (See FIG. 5 above, note configuration shown provides the noted functionality. See also col. 5, lines 4-32 and col. 3, lines 28-60 wherein following the pulse of light, the transistor 1 is turned off and the energy of the inductor 10 is 10 transferred to the capacitor 4). Regarding claim 4, Renz discloses the apparatus of claim 1 and further wherein the higher voltage level is greater than a voltage of the voltage source (See FIG. 5 above, note this is merely a property of the circuit shown), and wherein the diode has an anode coupled to the voltage source via the inductor and a cathode coupled to 15 the capacitor, such that the diode is forward biased when the voltage across the capacitor is at the lower voltage level and the diode is reverse biased when the voltage across the capacitor is at the higher voltage level (See FIG. 5 above, note diode 13). Regarding claim 7, Renz discloses the apparatus of claim 1 and further wherein 20 the light emitting element is a laser diode (See FIG. 5 above, note laser diode 2). Regarding claim 8, Renz disclose the apparatus of claim 7 and further comprising a drain diode coupled across the laser diode, wherein the drain diode Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 35 Art Unit: 3992 is configured to discharge an internal capacitance of the laser diode through the drain diode when the transistor is off (See FIG. 5 above, note drain/protective diode 11 coupled with laser diode 2). Regarding claim 21, Renz discloses the apparatus of claim 1 and further wherein 5 the capacitor has a first terminal and a second terminal, and wherein the discharge path forms a current path from the first terminal of the capacitor toward ground (See FIG. 5 above, note capacitor 8 has two terminals. Further note Examiners' interpretation of discharge path would include the current path flowing away from the top plate of the capacitor during discharge thereof would form a 10 path to the ground through the transistor 1'. Note also in view of the open claim language the discharge could also include the current path from the ground and through the laser diode 2 to the bottom plate of the capacitor). Regarding claim 27, Renz discloses the apparatus of claim 1 and further wherein a cycle of discharging and charging the capacitor is achieved by turning the 15 transistor on and off one time (See FIG. 5 above, note this claim recites merely an operational/functional characteristic of the structures shown). Regarding claim 28, Renz discloses the apparatus of claim 1 and further wherein a first terminal of the capacitor is coupled to the discharge path and a second terminal of the capacitor is coupled to ground (See FIG. 5 above and note 20 Examiners' interpretation of discharge path, which includes the current path moving away from the top plate/first terminal of the capacitor 4 and a current path moving towards the bottom plate/second terminal of the capacitor from the ground). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 36 Art Unit: 3992 Obviousness Rejections Applying FIG. 23A of Hall and Lidow Claims 5, 6, 16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over FIG. 23A of Hall in view of Lidow. Examiners find that Lidow is proper in this 5 reexamination proceeding because it is a printed publication. (See MPEP §221 0 and §2244--SNQs must be based on patents and printed publications). Examiners further find that Lidow was a book publication made available at least as early as March 2012 and was actually viewed by one having ordinary skill in the art at least as early as March 2, 2012 (See amazon.com webpage reprint mailed with the Order and made of record 10 herein showing comment of book posted March 2, 2012). Regarding claim 5, FIG. 23A of Hall_teaches the device of claim 1 and further the use of a field effect transistor, but not the specific type thereof. Nevertheless, Lidow teaches the use of gallium nitride field effect transistors (GaNFET) over traditional MOSFETs. It would have been obvious at the time the invention was made to use 15 GaNFETs for the transistors in the apparatus of FIG. 23A of Hall. One having ordinary skill in the art would make such a combination to provide a transistor with a reduction in power losses, a reduction system size, an improvement in efficiency and a reduction of system costs (See Lidow pages 3-11 ). Regarding claim 6, FIG. 23A of Hall and Lidow teach the apparatus of claim 5 20 and further wherein the control signal applies voltage to a gate of the GaNFET to selectively turn the GaNFET on and off (Note combination proposed for claim 5. See Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 37 Art Unit: 3992 also Hall FIG. 23A above wherein the control signal is supplied to the gate of the transistor 200 which would be a GaNFET in view of the combination). Regarding claim 16, FIG. 23A of Hall teaches the method of claim 9 and further wherein the transistor is turned on and turned off by applying a control signal to a 5 gate of the transistor (See FIG. 23A above, note control signal to transistor 200), but not specifically the transistor being a GaN FET transistor. Nevertheless, Lid ow teaches the use of gallium nitride field effect transistors (GaNFET) over traditional MOSFETs. It would have been obvious at the time the invention was made to use GaNFETs for the transistors in the apparatus of FIG. 23A of Hall. One having ordinary 10 skill in the art would make such a combination to provide a transistor with a reduction in power losses, a reduction system size, an improvement in efficiency and a reduction of system costs (See Lidow pages 3-11 ). Regarding claim 20, FIG. 23A of Hall teaches the device of claim 17 and further the use of a field effect transistor, but not the specific type thereof. Nevertheless, Lidow 15 teaches the use of gallium nitride field effect transistors (GaNFET) over traditional MOSFETs. It would have been obvious at the time the invention was made to use GaNFETs for the transistors in the apparatus of FIG. 23A of Hall. One having ordinary skill in the art would make such a combination to provide a transistor with a reduction in power losses, a reduction system size, an improvement in efficiency and a reduction of 20 system costs (See Lidow pages 3-11 ). Obviousness Rejections Applying FIG. 23A of Hall and Liero Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 38 Art Unit: 3992 Claims 5, 6, 16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over FIG. 23A of Hall in view of Liero. Examiners find that Liero is proper in this reexamination proceeding because it is a printed publication. (See MPEP §221 0 and §2244--SNQs must be based on patents and printed publications). Examiners further 5 find that Liero was published in IEEE as part of the IEEE MTT-S International Symposium in May 2010. Regarding claim 5, FIG. 23A of Hall teaches the device of claim 1 and further the use of a field effect transistor, but not the specific type thereof. Nevertheless, Liero teaches the use of gallium nitride field effect transistors (GaNFET) for various 10 application. (See Liero Part I, Introduction). It would have been obvious at the time of the effective filing date to use GaNFETs for the transistors in the apparatus of FIG. 23A of Hall. One having ordinary skill in the art would make such a combination to provide a transistor that is an "ideal candidate ... for applications, where fast switching of high current is needed." (See Liero at least Part I, Introduction). Furthermore, the example 15 of the application where such "fast switching" is needed to which to apply the GaNFET as taught by Liero is a diode laser circuit. (See Liero Parts I, II and IV wherein the GaNFET is used as the switching transistor for the diode laser circuit). Regarding claim 6, FIG. 23A of Hall and Liero teach the apparatus of claim 5 and further wherein the control signal applies voltage to a gate of the GaNFET to 20 selectively turn the GaNFET on and off (Note combination proposed for claim 5. See also Hall FIG. 23A above wherein the control signal is supplied to the gate of the transistor 200 which would be a GaNFET in view of the combination). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 39 Art Unit: 3992 Regarding claim 16, FIG. 23A of Hall teaches the method of claim 9 and further wherein the transistor is turned on and turned off by applying a control signal to a gate of the transistor (See FIG. 23A above, note control signal to transistor 200), but not specifically the transistor being a GaN FET transistor. Nevertheless, Liero teaches 5 the use of gallium nitride field effect transistors (GaNFET) for various application. (See Liero Part I, Introduction). It would have been obvious at the time of the effective filing date to use GaNFETs for the transistors in the apparatus of FIG. 23A of Hall. One having ordinary skill in the art would make such a combination to provide a transistor that is an "ideal candidate ... for applications, where fast switching of high current is 10 needed." (See Liero at least Part I, Introduction). Furthermore, the example of the application where such "fast switching" is needed to which to apply the GaNFET as taught by Liero is a diode laser circuit. (See Liero Parts I, II and IV wherein the GaNFET is used as the switching transistor for the diode laser circuit). Regarding claim 20, FIG. 23A of Hall teaches the device of claim 17 and further 15 the use of a field effect transistor, but not the specific type thereof. Nevertheless, Liero teaches the use of gallium nitride field effect transistors (GaNFET) for various application. (See Liero Part I, Introduction). It would have been obvious at the time of the effective filing date to use GaNFETs for the transistors in the apparatus of FIG. 23A of Hall. One having ordinary skill in the art would make such a combination to provide a 20 transistor that is an "ideal candidate ... for applications, where fast switching of high current is needed." (See Liero at least Part I, Introduction). Furthermore, the example of the application where such "fast switching" is needed to which to apply the GaNFET Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 40 Art Unit: 3992 as taught by Liero is a diode laser circuit. (See Liero Parts I, II and IV wherein the GaNFET is used as the switching transistor for the diode laser circuit). Obviousness Rejections Applying FIG. 23A of Hall 5 Claim 13 is rejected under 35 U.S.C. §1 03 as being unpatentable over FIG. 23A of Hall. See MPEP §2112(111-IV) allowing alternative rejections under 35 U.S.C. §1 02 and §1 03 when there is a question of inherency of whether a prior art device is capable of meeting an intended result or property of the claim. As discussed above, Examiners find that wherein the charging of the capacitor is carried out in about 500 nanoseconds 10 is merely an intended result or property of the claimed circuit and method. Nevertheless, even if it is assumed FIG. 23A of Hall does not explicitly disclose or teach such a feature, such charging would be obvious to one having ordinary skill in the art. Examiners first find that FIG. 23A of Hall otherwise discloses each and every feature of claim 13 and further providing a charging pulse to the capacitor of 5000 15 nanoseconds, but not explicitly a "charging" of the capacitor in about 500 nanoseconds. Nevertheless, modifying or operating FIG. 23A of Hall to have the relative charging time as recited in the claims would be obvious to one having ordinary skill in the art through routine experimentation because where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine 20 experimentation and the claimed device is not patentably distinct from the prior art device. See MPEP §2144.05(ii). It would have thus have been obvious to optimize the charging time of the capacitor in FIG. 23A of Hall to be about 500 nanoseconds Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 41 Art Unit: 3992 because such optimization would be routine skill in the art to maximize the performance of the known circuit structures shown in FIG. 23A of Hall, i.e., optimization of the capacitor structure and the timing of the firing of the transistor. 5 Obviousness Rejections Applying Renz and Lidow Claims 5 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Renz in view of Lidow. Regarding claim 5, Renz teaches the device of claim 1 and further the use of a field effect transistor, i.e., a MOSFET, but not the specific type thereof. Nevertheless, 10 Lidow teaches the use of gallium nitride field effect transistors (GaNFET) over traditional MOSFETs. It would have been obvious at the time the invention was made to use GaNFETs for the transistors in the apparatus of Renz. One having ordinary skill in the art would make such a combination to provide a transistor with a reduction in power losses, a reduction system size, an improvement in efficiency and a reduction of 15 system costs (See Lidow pages 3-11 ). Regarding claim 6, Renz and Lidow teach the apparatus of claim 5 and further wherein the control signal applies voltage to a gate of the GaNFET to selectively turn the GaNFET on and off (Note combination proposed for claim 5. See also Renz FIG. 5 above wherein the control signal is supplied to the gate of the transistor 2 which 20 would be a GaNFET in view of the combination). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Page 42 Control Number: 90/020,113 Art Unit: 3992 VIII. ART REJECTIONS APPLYING PATENT OWNER'S INTERPRETATION OF DISCHARGE PATH The following rejections are made in addition to the rejections above. As discussed in the Claim Interpretation section, Examiners have provided an interpretation 5 of discharge path. Nevertheless Patent Owner argues that this discharge path is limited to only the dashed line shown in FIG. 50 of the 936 Patent, reprinted above, and not that portion of the circuit between the bottom plate of the capacitor and the ground. While Examiners do not agree the discharge path is so limiting under the broadest reasonable interpretation, Examiners nevertheless do not find Patent Owner's 10 interpretation unreasonable. Examiners thus find Patent Owner's interpretation of the discharge path would be an alternative interpretation under the broadest reasonable interpretation. Thus, the rejections in this section are made using Patent Owner's interpretation of discharge path. 15 Anticipation Rejections Applying FIG. 238 of Hall Claims 1-4, 7, 9-14,17-19,21-28,30-37 and 39-46 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by FIG. 238 of Hall. Examiners again note Hall is a proper reference for use in this reexamination proceeding because it is a patent. (See MPEP §221 0 and §2244--SNQs must be based on patents and printed publications). 20 Regarding claim 1, FIG. 238 of Hall discloses an apparatus (See Hall FIG. 238, reprinted below), comprising: Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 43 Art Unit: 3992 ~ ~ ~ lj A42 .......... •..::~·\L ~.-. I ':".:t::.. Hall FIG. 238 a voltage source (See FIG. 238 above, note voltage source +5V); an inductor coupled to the voltage source, wherein the inductor is 5 configured to store energy in a magnetic field (See FIG. 238 above, note inductor 240); a diode coupled to the voltage source via the inductor (See FIG. 238, note diode shown but not identified coupled to inductor 240); a transistor configured to be turned on and turned off by a control signal 10 (See FIG. 238, note transistor FET2 activated by DSP control signal); a light emitting element coupled to the transistor (See FIG. 238 above, note laser diode 244); a capacitor coupled to a charging path and a discharge path (See FIG. 238, note capacitor 242. Note also Examiners' interpretation of charging path and Patent 15 Owner's interpretation of discharge path), wherein the charging path includes the Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 44 Art Unit: 3992 inductor and the diode, and wherein the discharge path includes the transistor and the light emitting element (See FIG. 238 above, note charging path would include at least the inductor 240 and shown but not identified diode and discharge path would include at least the transistor FET2 and the laser diode 244. See also Hall col. 7, 5 lines 42-46); wherein, responsive to the transistor being turned off, the capacitor is configured to charge via the charging path such that a voltage across the capacitor increases from a lower voltage level to a higher voltage level and the inductor is configured to release energy stored in the magnetic field such that a 10 current through the inductor decreases from a higher current level to a lower current level (See FIG. 238 above, note configuration shown which provided the recited functionality. See also col. 7, lines 42-46. Specifically, when the transistor FET2 is off, the capacitor is "configured" to be charged); and wherein, responsive to the transistor being turned on, the capacitor is 15 configured to discharge through the discharge path such that the light emitting element emits a pulse of light and the voltage across the capacitor decreases from the higher voltage level to the lower voltage level and the inductor is configured to store energy in the magnetic field such that the current through the inductor increases from the lower current level to the higher current level (See 20 FIG. 238, note configuration shown which provided the recited functionality. See also col. 7, lines 42-46. Specifically, when the transistor FET2 is on, the capacitor is discharged so that the laser diode fires). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 45 Art Unit: 3992 Regarding claim 2, FIG. 238 of Hall discloses the apparatus of claim 1 and further wherein the lower current level is approximately zero (See FIG. 238 wherein energy stored in the inductor is transferred to the capacitor when the transistor is turned off. Thus, the energy remaining in the inductor would be "approximately zero"). 5 Regarding claim 3, FIG. 238 of Hall discloses the apparatus of claim 1 and further wherein the capacitor is charged immediately following emission of a pulse of light from the light emitting element (See FIG. 238 above, note configuration shown provides the recited functionality. Note also that this claim recitation does not further define the structures of the claims, but merely recites an operational parameter, 10 i.e., further defines some unclaimed control of the circuit. Since, FIG. 238 otherwise discloses the positively recited structures, it reads on the intended operational parameters). Regarding claim 4, FIG. 238 of Hall discloses the apparatus of claim 1 and further wherein the higher voltage level is greater than a voltage of the voltage 15 source (See FIG. 238 above, note this is merely a property of the circuit shown), and wherein the diode has an anode coupled to the voltage source via the inductor and a cathode coupled to the capacitor, such that the diode is forward biased when the voltage across the capacitor is at the lower voltage level and the diode is reverse biased when the voltage across the capacitor is at the higher voltage 20 level (See FIG. 238 above, note shown but not identified diode coupled in series with the inductor 240). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 46 Art Unit: 3992 Regarding claim 7, FIG. 238 of Hall discloses the apparatus of claim 1 and further wherein the light emitting element is a laser diode (See FIG. 238 above, note laser diode 244). Regarding claim 9, FIG. 238 of Hall discloses a method (See FIG. 238 above 5 and col. 7, lines 42-46 and FIG. 24), comprising: turning off a transistor (See col. 7, lines 42-47 wherein a transistor is turned on and off), wherein the transistor is coupled to a light emitting element (See FIG. 238 above, note transistor FET2 coupled to laser diode 244 ), wherein both the transistor and the light emitting element are included in a discharge path coupled to a 10 capacitor (See FIG. 238 above. Note also Patent Owner's interpretation of discharge path as discussed above. Thus, note discharge path would include transistor FET2, capacitor 242 and laser diode 244), wherein the capacitor is also coupled to a charging path including a diode and an inductor, wherein the inductor is configured to store energy in a magnetic field, wherein the diode is coupled to a 15 voltage source via the inductor (See FIG. 238 above. Note also Examiners' interpretation of charging path as discussed above. Thus, note charge path would include voltage source +5V, inductor 240 and series connected shown but not identified diode), and wherein, responsive to the transistor being turned off, the capacitor is configured to charge via the charging path such that a voltage across the 20 capacitor increases from a lower voltage level to a higher voltage level and the inductor is configured to release energy stored in the magnetic field such that a current through the inductor decreases from a higher current level to a lower Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 47 Art Unit: 3992 current level (See FIG. 238, note configuration shown which provided the recited functionality. See also col. 7, lines 42-46. Specifically, when the transistor FET2 is off, the capacitor is "configured" to be charged); and turning on the transistor, wherein responsive to the transistor being turned 5 on, the capacitor is configured to discharge through the discharge path such that the light emitting element emits a pulse of light and the voltage across the capacitor decreases from the higher voltage level to the lower voltage level and the inductor is configured to store energy in the magnetic field such that the current through the inductor increases from the lower current level to the higher 10 current level (See FIG. 238, note configuration shown which provided the recited functionality. See also col. 7, lines 42-46. Specifically, when the transistor FET2 is on, the capacitor is discharged so that the laser diode fires). Regarding claim 10, FIG. 238 of Hall discloses the method of claim 9 and further wherein the lower current level is approximately zero (See FIG. 238 wherein energy 15 stored in the inductor is transferred to the capacitor when the transistor is turned off. Thus, the energy remaining in the inductor would be "approximately zero"). Regarding claim 11, FIG. 238 of Hall discloses the method of claim 9 and further wherein the capacitor is charged immediately following emission of a pulse of light from the light emitting element (See FIG. 238 above, note configuration shown 20 provides the recited functionality. Note also that this claim recitation does not further define the structures of the claims, but merely recites an operational parameter, i.e., further defines some unclaimed control of the circuit. Since, FIG. 238 otherwise Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 48 Art Unit: 3992 discloses the positively recited structures, it reads on the intended operational parameters). Regarding claim 12, FIG. 238 of Hall discloses the method of claim 9 and further wherein the higher voltage level is greater than a voltage of the voltage source 5 (See FIG. 238 above, note this is merely a property of the circuit shown), and wherein the diode has an anode coupled to the voltage source via the inductor and a cathode coupled to the capacitor, such that the diode is forward biased when the voltage across the capacitor is at the lower voltage level and the diode is reverse biased when the voltage across the capacitor is at the higher voltage level (See 10 FIG. 238 above, note shown but not identified diode coupled in series with the inductor 240). Regarding claim 13, FIG. 238 of Hall discloses the method of claim 9 and further wherein the charging of the capacitor is carried out in about 500 nanoseconds (Examiners find that this limitation is merely an intended result or property of the circuit 15 and the turning on and off of the transistor in the method recited in claim 9. Accordingly, this limitation is non-limiting of the claim and thus Hall reads on this claim. Additionally and alternatively, since FIG. 238 of Hall otherwise discloses the recited circuit and performs the recited method steps, the circuit of Hall would be capable of meeting the intended result). 20 Regarding claim 14, FIG. 238 of Hall discloses the method of claim 9 and further wherein the light emitting element is a laser diode (See FIG. 238 above, note laser diode 244). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 49 Art Unit: 3992 Regarding claim 17, FIG. 238 of Hall discloses a light detection and ranging (LIDAR) device (See FIG. 238 above and FIG. 9A and see col. 3, lines 3-4 and col. 4, lines 41-43) comprising: a light source including: a voltage source (See FIG. 238 above, note voltage source +5V); 5 an inductor coupled to the voltage source, wherein the inductor is configured to store energy in a magnetic field (See FIG. 238 above, note inductor 240); a diode coupled to the voltage source via the inductor (See FIG. 238, note 10 diode shown but not identified coupled to inductor 240); a transistor configured to be turned on and turned off by a control signal (See FIG. 238, note transistor FET2 activated by DSP control signal); a light emitting element coupled to the transistor (See FIG. 238 above, note laser diode 244); 15 a capacitor coupled to a charging path and a discharge path (See FIG. 238, note capacitor 242. Note Examiners' interpretation above for charging path and Patent Owner's interpretation of discharge path), wherein the charging path includes the inductor and the diode, and wherein the discharge path includes the transistor and the light emitting element (See FIG. 238 above, note charging path which would 20 include inductor 240 and shown but not identified diode and discharge path including the transistor FET2 and the laser diode 244. See also Hall col. 7, lines 42-46); Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 50 Art Unit: 3992 wherein, responsive to the transistor being turned off, the capacitor is configured to charge via the charging path such that a voltage across the capacitor increases from a lower voltage level to a higher voltage level and the inductor is configured to release energy stored in the magnetic field such that a 5 current through the inductor decreases from a higher current level to a lower current level (See FIG. 238, note configuration shown which provided the recited functionality. See also col. 7, lines 42-46. Specifically, when the transistor FET2 is off, the capacitor is "configured" to be charged); and wherein, responsive to the transistor being turned on, the capacitor is 10 configured to discharge through the discharge path such that the light emitting element emits a pulse of light and the voltage across the capacitor decreases from the higher voltage level to the lower voltage level and the inductor is configured to store energy in the magnetic field such that the current through the inductor increases from the lower current level to the higher current level (See 15 FIG. 238, note configuration shown which provided the recited functionality. See also col. 7, lines 42-46. Specifically, when the transistor FET2 is on, the capacitor is discharged so that the laser diode fires); a light sensor configured to detect a reflected light signal comprising light from the emitted light pulse reflected by a reflective object (See col. 3, lines 4-9 20 and col. 4, lines 21-26 wherein the circuit of FIG. 238 is part of a LIDAR system which uses photo detectors as light sensors as part of the system); and Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 51 Art Unit: 3992 a controller configured to determine a distance to the reflective object based on the reflected light signal (See col. 4, lines 21-43 which uses a DSP to determine ranging information). Regarding claim 18, FIG. 238 of Hall discloses the device of claim 17 and further 5 wherein the lower current level is approximately zero (See FIG. 238 wherein energy stored in the inductor is transferred to the capacitor when the transistor is turned off. Thus, the energy remaining in the inductor would be "approximately zero"). Regarding claim 19, FIG. 238 of Hall discloses the device of claim 17 and further wherein the capacitor is charged immediately following emission of a pulse of 10 light from the light emitting element (See FIG. 238 above, note configuration shown provides the recited functionality. Note also that this claim recitation does not further define the structures of the claims, but merely recites an operational parameter, i.e., further defines some unclaimed control of the circuit. Since, FIG. 238 otherwise discloses the positively recited structures, it reads on the intended operational 15 parameters). Regarding claim 21, FIG. 238 of Hall discloses the apparatus of claim 1 and further wherein the capacitor has a first terminal and a second terminal, and wherein the discharge path forms a current path from the first terminal of the capacitor toward ground (See FIG. 238 above, note capacitor 242 has two terminals. 20 Further note Patent Owner's interpretation of discharge path would include the current path flowing away from the top plate of the capacitor during discharge thereof would form a path to the ground through the transistor FET2). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 52 Art Unit: 3992 Regarding claim 22, FIG. 238 of Hall discloses the apparatus of claim 1 and further wherein the capacitor has a first terminal and a second terminal, and wherein the transistor and the light emitting element are coupled in series between the first terminal of the capacitor and ground (See FIG. 238, note 5 capacitor 242 has such first and second terminals. Note also transistor FET2 and laser diode 244 are coupled in series between the first terminal of the capacitor and ground). Regarding claim 23, FIG. 238 of Hall discloses the apparatus of claim 1 and further wherein an anode of the light emitting element is coupled to the capacitor (See FIG. 238, note anode of laser diode 244 is coupled to the capacitor 242). 10 Regarding claim 24, FIG. 238 of Hall discloses the apparatus of claim 1 and further wherein a cathode of the light emitting element is coupled to the transistor (See FIG. 238, note cathode of laser diode 244 is coupled to transistor FET2). Regarding claim 25, FIG. 238 of Hall discloses the apparatus of claim 1 and further wherein the light emitting element is coupled between the capacitor and the 15 transistor (See FIG. 238 above, note laser diode 244 is coupled between the capacitor 242 and the transistor FET2). Regarding claim 26, FIG. 238 of Hall discloses the apparatus of claim 1 and further wherein the capacitor is configured to charge via the charging path responsive to turning off the transistor that is on to discharge the capacitor 20 through the discharge path (See FIG. 238 above, note this is merely a property of the circuit shown). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 53 Art Unit: 3992 Regarding claim 27, FIG. 238 of Hall discloses the apparatus of claim 1 and further wherein a cycle of discharging and charging the capacitor is achieved by turning the transistor on and off one time (See FIG. 238 above, note this claim recites merely an operational/functional characteristic of the structures shown). 5 Regarding claim 28, FIG. 238 of Hall discloses the apparatus of claim 1 and further wherein a first terminal of the capacitor is coupled to the discharge path and a second terminal of the capacitor is coupled to ground (Note Patent Owner's claim interpretation of the discharge path. Thus, see FIG. 238 wherein the top plate of the capacitor 242 is coupled to the discharge path and the bottom plate of the capacitor 10 is coupled to the ground). Regarding claim 30, FIG. 238 of Hall discloses the method of claim 9 and further wherein the capacitor has a first terminal and a second terminal, and wherein the discharge path forms a current path from the first terminal of the capacitor toward ground (See FIG. 238 above, note capacitor 242 has two terminals. 15 Further note Patent Owner's interpretation of discharge path would include the current path flowing away from the top plate of the capacitor during discharge thereof would form a path to the ground through the transistor FET2). Regarding claim 31, FIG. 238 of Hall discloses the method of claim 9 and further wherein the capacitor has a first terminal and a second terminal, and wherein the 20 transistor and the light emitting element are coupled in series between the first terminal of the capacitor and ground (See FIG. 238, note capacitor 242 has such Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 54 Art Unit: 3992 first and second terminals. Note also transistor FET2 and laser diode 244 are coupled in series between the first terminal of the capacitor and ground). Regarding claim 32, FIG. 238 of Hall discloses the method of claim 9 and further wherein an anode of the light emitting element is coupled to the capacitor (See 5 FIG. 238, note anode of laser diode 244 is coupled to the capacitor 242). Regarding claim 33, FIG. 238 of Hall discloses the method of claim 9 and further wherein a cathode of the light emitting element is coupled to the transistor (See FIG. 238, note cathode of laser diode 244 is coupled to transistor FET2). Regarding claim 34, FIG. 238 of Hall discloses the method of claim 9 and further 10 wherein the light emitting element is coupled between the capacitor and the transistor (See FIG. 238 above, note laser diode 244 is coupled between the capacitor 242 and the transistor FET2). Regarding claim 35, FIG. 238 of Hall discloses the method of claim 9 and further wherein turning off the transistor to charge the capacitor via the charging path is 15 performed to turn off the transistor that is on to discharge the capacitor through the discharge path (See FIG. 238, note this is merely a property of the structures shown). Regarding claim 36, FIG. 238 of Hall discloses the method of claim 9 and further wherein a cycle of discharging and charging the capacitor is achieved by turning 20 the transistor on and off one time (See FIG. 238 above, note this claim recites merely an operational/functional characteristic of the structures shown). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 55 Art Unit: 3992 Regarding claim 37, FIG. 238 of Hall discloses the method of claim 9 and further wherein a first terminal of the capacitor is coupled to the discharge path and a second terminal of the capacitor is coupled to ground (Note Patent Owner's claim interpretation of the discharge path. Thus, see FIG. 238 wherein the top plate of the 5 capacitor 242 is coupled to the discharge path and the bottom plate of the capacitor is coupled to the ground). Regarding claim 39, FIG. 238 of Hall discloses the device of claim 17 and further wherein the capacitor has a first terminal and a second terminal, and wherein the discharge path forms a current path from the first terminal of the 10 capacitor toward ground (See FIG. 238 above, note capacitor 242 has two terminals. Further note Patent Owner's interpretation of discharge path would include the current path flowing away from the top plate of the capacitor during discharge thereof would form a path to the ground through the transistor FET2). Regarding claim 40, FIG. 238 of Hall discloses the device of claim 17 and further 15 wherein the capacitor has a first terminal and a second terminal, and wherein the transistor and the light emitting element are coupled in series between the first terminal of the capacitor and ground (See FIG. 238, note capacitor 242 has such first and second terminals. Note also transistor FET2 and laser diode 244 are coupled in series between the first terminal of the capacitor and ground). 20 Regarding claim 41, FIG. 238 of Hall discloses the device of claim 17 and further wherein an anode of the light emitting element is coupled to the capacitor (See FIG. 238, note anode of laser diode 244 is coupled to the capacitor 242). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 56 Art Unit: 3992 Regarding claim 42, FIG. 238 of Hall discloses the device of claim 17 and further wherein a cathode of the light emitting element is coupled to the transistor (See FIG. 238, note cathode of laser diode 244 is coupled to transistor FET2). Regarding claim 43, FIG. 238 of Hall discloses the device of claim 17 and further 5 wherein the light emitting element is coupled between the capacitor and the transistor (See FIG. 238 above, note laser diode 244 is coupled between the capacitor 242 and the transistor FET2). Regarding claim 44, FIG. 238 of Hall discloses the device of claim 17 and further wherein the capacitor is configured to charge via the charging path responsive to 10 turning off the transistor that is on to discharge the capacitor through the discharge path (See FIG. 238 above, note this is merely a property of the circuit shown). Regarding claim 45, FIG. 238 of Hall discloses the device of claim 17 and further wherein a cycle of discharging and charging the capacitor is achieved by turning 15 the transistor on and off one time (See FIG. 238 above, note this claim recites merely an operational/functional characteristic of the structures shown). Regarding claim 46, FIG. 238 of Hall discloses the device of claim 17 and further wherein a first terminal of the capacitor is coupled to the discharge path and a second terminal of the capacitor is coupled to ground (Note Patent Owner's claim 20 interpretation of the discharge path. Thus, see FIG. 238 wherein the top plate of the capacitor 242 is coupled to the discharge path and the bottom plate of the capacitor is coupled to the ground). Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 57 Art Unit: 3992 Obviousness Rejections Applying FIG. 238 of Hall and Liero Claims 5, 6, 16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over FIG. 238 of Hall in view of Liero. Examiners find that Liero is proper in this 5 reexamination proceeding because it is a printed publication. (See MPEP §221 0 and §2244--SNQs must be based on patents and printed publications). Examiners further find that Liero was published in IEEE as part of the IEEE MTT-S International Symposium in May 2010. Regarding claim 5, FIG. 238 of Hall teaches the device of claim 1 and further the 10 use of a field effect transistor, but not the specific type thereof. Nevertheless, Liero teaches the use of gallium nitride field effect transistors (GaNFET) for various application. (See Liero Part I, Introduction). It would have been obvious at the time of the effective filing date to use GaNFETs for the transistors in the apparatus of FIG. 238 of Hall. One having ordinary skill in the art would make such a combination to provide a 15 transistor that is an "ideal candidate ... for applications, where fast switching of high current is needed." (See Liero at least Part I, Introduction). Furthermore, the example of the application where such "fast switching" is needed to which to apply the GaNFET as taught by Liero is a diode laser circuit. (See Liero Parts I, II and IV wherein the GaNFET is used as the switching transistor for the diode laser circuit). 20 Regarding claim 6, FIG. 238 of Hall and Liero teach the apparatus of claim 5 and further wherein the control signal applies voltage to a gate of the GaNFET to selectively turn the GaNFET on and off (Note combination proposed for claim 5. See Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Page 58 Control Number: 90/020,113 Art Unit: 3992 also Hall FIG. 238 above wherein the control signal is supplied to the gate of the transistor 200 which would be a GaNFET in view of the combination). Regarding claim 16, FIG. 238 of Hall teaches the method of claim 9 and further wherein the transistor is turned on and turned off by applying a control signal to a 5 gate of the transistor (See FIG. 238 above, note control signal to transistor 200), but not specifically the transistor being a GaN FET transistor. Nevertheless, Liero teaches the use of gallium nitride field effect transistors (GaNFET) for various application. (See Liero Part I, Introduction). It would have been obvious at the time of the effective filing date to use GaNFETs for the transistors in the apparatus of FIG. 238 of Hall. One 10 having ordinary skill in the art would make such a combination to provide a transistor that is an "ideal candidate ... for applications, where fast switching of high current is needed." (See Liero at least Part I, Introduction). Furthermore, the example of the application where such "fast switching" is needed to which to apply the GaNFET as taught by Liero is a diode laser circuit. (See Liero Parts I, II and IV wherein the 15 GaNFET is used as the switching transistor for the diode laser circuit). Regarding claim 20, FIG. 238 of Hall teaches the device of claim 17 and further the use of a field effect transistor, but not the specific type thereof. Nevertheless, Liero teaches the use of gallium nitride field effect transistors (GaNFET) for various application. (See Liero Part I, Introduction). It would have been obvious at the time of 20 the effective filing date to use GaNFETs for the transistors in the apparatus of FIG. 238 of Hall. One having ordinary skill in the art would make such a combination to provide a transistor that is an "ideal candidate ... for applications, where fast switching of high Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 59 Art Unit: 3992 current is needed." (See Liero at least Part I, Introduction). Furthermore, the example of the application where such "fast switching" is needed to which to apply the GaNFET as taught by Liero is a diode laser circuit. (See Liero Parts I, II and IV wherein the GaNFET is used as the switching transistor for the diode laser circuit). 5 Obviousness Rejections Applying FIG. 238 of Hall Claim 13 is rejected under 35 U.S.C. §1 03 as being unpatentable over FIG. 238 of Hall. See MPEP §2112(111-IV) allowing alternative rejections under 35 U.S.C. §1 02 and §1 03 when there is a question of inherency of whether a prior art device is capable 10 of meeting an intended result or property of the claim. As discussed above, Examiners find that wherein the charging of the capacitor is carried out in about 500 nanoseconds is merely an intended result or property of the claimed circuit and method. Nevertheless, even if it is assumed FIG. 238 of Hall does not explicitly disclose or teach such a feature, such charging would be obvious to one having ordinary skill in the art. 15 Examiners first find that FIG. 238 of Hall otherwise discloses each and every feature of claim 13 and further providing a charging pulse to the capacitor of 5000 nanoseconds, but not explicitly a "charging" of the capacitor in about 500 nanoseconds. Nevertheless, modifying or operating FIG. 238 of Hall to have the relative charging time as recited in the claims would be obvious to one having ordinary skill in the art through 20 routine experimentation because where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation and the claimed device is not patentably distinct from the prior art Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 60 Art Unit: 3992 device. See MPEP §2144.05(ii). It would have thus have been obvious to optimize the charging time of the capacitor in FIG. 238 of Hall to be about 500 nanoseconds because such optimization would be routine skill in the art to maximize the performance of the known circuit structures shown in FIG. 238 of Hall, i.e., optimization of the 5 capacitor structure and the timing of the firing of the transistor. IX. CONFIRMED/PATENTABLE CLAIMS Claims 29, 38 and 37 are found patentable herein. While Examiners find that the prior art cited in the Request, particularly Hall and Renz discloses each and every 10 feature of claims 1, 9 and 17 from which these claims depend, Examiners find the prior art cited in the Request does not disclose or teach coupling a second terminal of the capacitor to a reference voltage other than ground as recited in these claims and in combination with the other features of these claims. 15 X. EXAMINERS' RESPONSES TO PATENT OWNER'S ARGUMENTS REGARDING ART REJECTIONS Examiners recognize the Patent Owner's arguments traversing the rejections applying FIG. 23A of Hall and Renz. See Feb 2018 Amendment pages 41-42. Examiners further note these arguments are based on Patent Owner's interpretation of 20 the discharge path, which is distinct from the Examiners' Interpretation. As noted above Examiners do not agree with Patent Owner's interpretation of the discharge path. Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 61 Art Unit: 3992 Accordingly, Examiners do not find these arguments persuasive and thus maintain the rejections applying FIG. 23A of Hall and Renz. Patent Owner also addressed Examiners comments during the interview regarding the application of FIG. 238 of Hall as a basis for rejection. As provided 5 above, several of the claims are now rejected on this basis. Patent Owner traverses this rejection by arguing that the firing circuit of FIG. 238 of Hall is "different than the firing circuits in the '936 Patent wherein charging and discharging of the capacitor is responsive to the operation of the same transmitter." See Feb 2018 Amendment pages 43-44. Examiners do not dispute that the circuit of FIG. 238 of Hall is different than the 10 circuit disclosed in the figures of the 936 Patent for this reasons. However, this agreement is not sufficient to overcome the rejections since it is the claim language at issue in the rejections. The pending and examined claims herein are written broader than any embodiment disclosed in the specification of the 936 Patent. For example, claim 1 15 recites that "responsive to the transistor being turned off, the capacitor is configured to charge via the charging path such that a voltage across the capacitor increases from a lower voltage level to a higher voltage level and the inductor is configured to release energy stored in the magnetic field such that a current through the inductor decreases from a higher current level to a lower current level." This recitation does not requiring 20 any charging of the capacitor. Rather this limitation only requires the capacitor to be "configured" to do so once the transistor is turned off, i.e., in "response to." Examiners find this operation is met by the circuit shown in FIG. 238 of Hall as discussed above in Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 62 Art Unit: 3992 the rejection. The turning off of the transistor FET2 puts in the capacitor 242 in the "configuration" to charge, whether is actually charges or not. The capacitor 242 will not charge if the transistor FET2 is on so a clear requirement for any charging to occur is the transistor to be off, i.e., "responsive to the transistor being turned off." The capacitor 5 242 is ready and configured to charge, but just has to wait until the charge pulse to actually charge. Similarly, claim 1 recites "responsive to the transistor being turned on, the capacitor is configured to discharge through the discharge path such that the light emitting element emits a pulse of light and the voltage across the capacitor decreases 10 from the higher voltage level to the lower voltage level and the inductor is configured to store energy in the magnetic field such that the current through the inductor increases from the lower current level to the higher current level." This recitation does not requiring any discharging of the capacitor. Rather this limitation only requires the capacitor to be "configured" to do so once the transistor is turned on. Examiners find 15 this operation is met by the circuit shown in FIG. 238 of Hall as discussed above in the rejection. Furthermore, Examiners find FIG. 238 of Hall discloses the capacitor 242 as "configured" and further teaches the actual firing of the laser diode during discharge of the capacitor when the transistor FET2 is turned on. Examiners do not dispute that FIG. 238 of Hall uses two transistors for charging 20 and discharging (FET1 and FET2). However, transistor FET2 directly controls the discharging of the capacitor in an "on" state and transistor FET2 must be "off' for the Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 63 Art Unit: 3992 capacitor to be "configured" to charge. Accordingly, Examiners find that FIG. 238 of Hall reads on one or more claims and now provides rejections on this basis. Regarding the dependent claims and the newly added dependent claims, Patent Owner makes no separate arguments therefor other than those made for the 5 independent claims and Examiners find no response is necessary. XI. LITIGATION IN RELATION TO U.S. PATENT NO. 9,368,936 It is noted that pending litigation was found regarding the 936 Patent, Waymo LLC v. Ulber Technologies, Inc. eta/., 3:17cv939 (U.S. Dist. Cal. Northern). However, 10 Examiners find it appears from the record for this litigation that the patent claims were dismissed on July 7, 2017. Nevertheless, the patent owner is reminded of the continuing responsibility under 37 C.F.R. §1.565(a) to apprise the Office of any litigation activity, or other prior or concurrent proceeding, throughout the course of this reexamination proceeding. The third party requester is also reminded of the ability to 15 similarly apprise the Office of any such activity or proceeding throughout the course of this reexamination proceeding. See MPEP §§2207, 2282 and 2286. XII. CONCLUDING REMARKS Claims 1-47 are subject to reexamination herein. 20 Claims 1-28, 30-37 and 39-46 are rejected herein. Claims 29, 38 and 47 are found patentable. Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Page 64 Control Number: 90/020,113 Art Unit: 3992 Examiners note that this action is the second action in this reexamination proceeding, but is nevertheless non-final in view of the new grounds of rejection of claims 1-7, 9-14 and 17-20 based on FIG. 23B of Hall. Extensions of time under 37 C. F. R. § 1.136(a) will not be permitted in these 5 proceedings because the provisions of 37 C. F. R. § 1.136 apply only to "an applicant" and not to parties in a reexamination proceeding. Additionally, 35 U.S.C. §305 requires that reexamination proceedings "will be conducted with special dispatch" (37 C.F.R. §1.550(a)). Extension of time in reexamination proceedings are provided for in 37 C.F.R. §1.550(c). After the filing of a request for reexamination by a third party 10 requester, any document filed by either the patent owner of the third party requester must be served on the other party (or parties where two or more third-party-requester proceedings .are merged) in the reexamination proceeding in the manner provided in 37 C.F.R. §1.248. See 37 C.F.R. §1.550(f). All correspondence relating to this ex parte reexamination proceeding should be 15 20 25 directed as follows: By U.S. Postal Service Mail to: Mail Stop Ex Parte Reexam ATTN: Central Reexamination Unit Commissioner for Patents P.O. Box 1450 Alexandria, VA 22313-1450 By FAX to: (571) 273-9900 Central Reexamination Unit By hand to: Customer Service Window Randolph Building 401 Dulany St. Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301 Control Number: 90/020,113 Page 65 Art Unit: 3992 Alexandria, VA 22314 For EFS-Web transmissions, 37 CFR 1.8(a)(1 )(i) (C) and (ii) states that correspondence (except for a request for reexamination and a corrected or replacement 5 request for reexamination) will be considered timely filed if (a) it is transmitted via the Office's electronic filing system in accordance with 37 C.F.R. §1.6(a)(4), and (b) includes a certificate of transmission for each piece of correspondence stating the date of transmission, which is prior to the expiration of the set period of time in the Office action. 10 Any inquiry concerning this communication or earlier communications from the Reexamination Legal Advisor or Examiner, or as to the status of this proceeding, should be directed to the Central Reexamination Unit at telephone number (571) 272-7705. Signed: 15 /KENNETH J WHITTINGTON/ Primary Examiner, Art Unit 3992 20 Conferees: /My Trang Ton/ Primary Examiner CRU, AU 3992 25 /Andrew J. Fischer/ Supervisory Patent Reexamination Specialist, Art Unit 3992 Ex parte Reexamination- Non-Final Office Action Part of Paper No. 20180301